6607 Evergreen Springs Court
Spring, Texas 77379
Experienced hardware and software engineer. Software architecture, development, debug, test, and program managment experience of desktop, embedded, and web applications, services, drivers, and firmware for Linux, Windows, UNIX, and DOS. In-depth knowledge of PC hardware video architecture and software APIs. Hardware experience includes conception, architecture, design, prototyping, debug, test, productization, and maintenance of many high speed mixed-signal designs for video and graphics subsystems. Experience with board design, PCB layout, agency certification, qualification, manufacturing test, vendor evaluation/selection/management, documentation, procurement, technical support, and legal and marketing aspects of product development. Excellent problem solving and documentation skills.
Currently a Master Engineer developing Linux and VMware device drivers for storage controllers for industry standard servers.
- Architect and developer of Linux and Windows applications for desktop solutions (commercial and enterprise desktops, thin clients, and retail point of sale systems).
- Architect and developer in international software development team which worked on education solutions (e.g., TeachNow).
- Member of core team which determined strategy and direction for commercial and enterprise desktops graphics and video.
- Personal Systems Group (PSG) technical focal point for graphics and video responsible for coordinating graphics and video technologies across business units within PSG and across business groups within HP.
- Mentor for junior engineers.
- System administrator for Red Hat Enterprise Linux and CentOS servers.
- Developed software for multimedia applications for Linux and Windows based thin-clients.
- Lead engineer on:
- PCI Express, AGP, PCI, ISA, DVO, and sDVO integrated and add-in card graphics and video solutions supporting various combinations of DisplayPort, DVI, DFP, DMS-59, LFH-60, VGA, VAFC, VMC, Compaq Multimedia Bus, VFC, S-video, and composite video (input and output) connectors.
- Dual tuner satellite receiver board which supported conditional access (CA), MPEG-2, and IP data, and utilized a USB IR remote.
- Time-shifting standard definition tuner board, and HDTV all-format decoder board.
- PC Theatre multimedia subsystem which included dual tuners, NTSC and PAL video decoding and de-interlacing, DVD MPEG-2 video and AC-3 audio decoding, high quality audio subsystem, and 3D graphics.
- IEEE-1394 add-in cards and ATA-100 add-in card.
- USB video-conferencing cameras, DV camcorders, and digital still-image cameras.
- Various video solutions utilizing analog and digital encoders and decoders, tuners, hardware DVD decoder, TrueQ MPEG-1 decoder option card, etc.
- Consulting engineer on standard definition (SD) and high definition (HD) plasma displays with integrated tuners (SD and HD), providing video architecture, specification, design, and testing experience.
- Consulting engineer and programmer for Microsoft Windows® color management software (ColoReal®).
- Generated software (in C, C++ with OOP, Ruby, and assembly for DOS, Windows®, and Linux) for selection, test, and validation of graphics, video, and audio systems. Knowledgeable with DirectX®, GDI, and X Window System APIs, BIOS, driver development, integration, and testing, GPIB, I2C, RS-232, and parallel port programming.
- Responsible for architecture, selection, and design of graphics, video, and audio subsystems on consumer and commercial desktops, and consumer portables. Program manager on selected projects.
- Specified, designed, and debugged hardware and software for DSP based spectrum analyzer (to test PC speakers for distortion and amplitude), analog data acquisition system (to test power supplies), and various other test fixtures to test graphics, video, and audio solutions.
Electrical Design Engineer responsible for design, debug, and documentation of embedded hardware and software to test production boards for AAWS-M anti-tank missile (JAVELIN).
- Designed and debugged high speed 10-layer mixed signal PCBs for testing Image Array Processor board and Master Controller Processor board.
- Developed firmware and software using C, X Window System, and Intel 8751 assembly language for image processing and display, and testing of production boards.
- Designed and debugged hardware and developed firmware and software for Bus Interface Controller Card which supported JTAG, GPIB (IEEE-488), High Speed 1750A CPU, and digital I/O using embedded Intel microcontroller.
- System administrator for HP UNIX System V workstations.
Computer programmer/technician responsible for design of digital image processing and real-time custom visual stimuli display software and analysis software for basic vision research using PC and SGI IRIS workstations.
- Wrote C, 80x86 assembly, FORTRAN, Pascal, and BASIC software for PCs, microVAXes, and CRAY supercomputer, to generate and analyze images (using Fourier and Gabor analysis), and display images on CGA, EGA, VGA, IBM PGA, PC Vision, and DT-2871 PC option cards, and SGI IRIS supergraphics workstations.
- System administrator for UNIX System V IRIS graphics workstations.
2010: RH442VT Red Hat Enterprise System Monitoring and Performance Tuning.
2009: Microtesting Vol. 3: Collaborations, Microtesting Vol. 4: Legacy Code..
2008: RHD221 Red Hat Linux Device Drivers, RHD236 Red Hat Linux Kernel Internals, Lattice FPGAs with Verilog, Code Smells, Refactoring, Microtesting Vol. 1: The Basics, Microtesting Vol. 2: Test-Driven Development.
2007: Pragmatic Studio Test-Driven Development with Rails Studio.
2006: Pragmatic Studio Ruby on Rails, Pragmatic Studio Advanced Rails, Writing Contracts.
2005: Advanced High Speed Signal Propagation, Accelerated Linux System Administration, Technical Career Path Catalyst, CIM/WBEM Seminar, Cross-Cultural Executive Briefings, DHTML and CSS, Working with Sendmail and Apache in Linux.
2004: Secure Communications and Virtual Private Networks, Documents on Trial: Law and Preventive Writing.
2003: PCI Express, EMI/ESD Product Design Considerations, Writing UNIX Shell Programs.
2002: RH253 Red Hat Linux Networking and Security Administration, RH300 RHCE Rapid Track Course.
2000: Windows 2000 Kernel Debugging, High Speed Digital Design.
|MEE in Computer Systems Engineering at Rice University (Houston, TX)
- Major in VLSI design with minors in DSP/image processing and advanced optimizing compiler construction.
- Project lead and designer in a team which designed, simulated, fabricated and tested a full custom ASIC for vending machine controller using VHDL, Lager, Magic, PSPICE, and eSIM.
- Relevant classes include: VLSI Design I and II, Digital Signal Processing I, Digital Image Processing, Compiler Construction, Advanced Compiler Optimization, Computer Systems Design, and Digital Systems Design.
- Relevant classes include: Computer Graphics, RISC Architecture and Compilers, Microprogramming, Parallel Processing, Computer Architecture and Organization, and Operating Systems.
- Generated various compilers, simulators for VLIW, bit-sliced, RISC, CISC, and microprogrammed processors for functional and procedural languages.
Pending: Multi-number Wireless Communications System and Method.
Pending: Automatic Optimized Scanning with Color Characterization Data.
Pending: Method of Optimizing Video Output for a Computer System with Digital-to-Analog Converter Characterization Data.
8,358,347: Frame Rate Measurement.
8,031,268: Audio over a Standard Video Cable.
7,952,748: Display Device Output Adjustment System and Method.
7,893,998: Audio over a Standard Video Cable.
7,760,207: Image Display Adjustment System and Method.
7,609,255: Supplying Power from a Display Device to a Source Using a Standard DVI Video Cable.
7,398,008: Copy Protection for Analog Video Signals from Computing Devices.
7,283,430: Systems And Methods For Overriding An Ejection Lock.
6,859,538: Plug and play compatible speakers.
6,765,624: Simulated burst gate signal and video synchronization key for use in video decoding.
6,670,994: Method and apparatus for display of interlaced images on non-interlaced display.
6,504,577: Method and apparatus for display of interlaced images on non-interlaced display.
6,441,812: Hardware system for genlocking.
6,314,523: Apparatus for distributing power to a system of independently powered devices.
6,300,980: Computer system design for distance viewing of information and media and extensions to display data channel for control panel interface.
6,295,090: Apparatus for providing video resolution compensation when converting one video source to another video source.
6,201,580: Apparatus for supporting multiple video resources.
6,166,772: Method and apparatus for display of interlaced images on non-interlaced display.
5,892,933: Digital bus.
- 519035 Improved RF tuning of television signals, Disclosed anonymously, HP Research Disclosure, July 2007.
- 519030 Saturation control for high definition video, Disclosed anonymously, HP Research Disclosure, July 2007.
- 487018 Hard case with embedded keyboard for a small portable computer by Christopher Voltz, HP Research Disclosure, November 2004.
- Shape Discrimination Research Using an IBM PC by Christopher D. Voltz and Dr. George A. Geri. Air Force Human Resources Laboratory Final Technical Report for Period Oct. 1987 to July 1989.
- Texture Discrimination Research Using an IBM PC by Dr. George A. Geri and Christopher D. Voltz. Air Force Human Resources Laboratory Final Technical Report for Period Oct. 1987 to July 1989.
- Most commonly used
- Compiled: C, C++
- Assembly: 80x86
- Used in previous projects
- Compiled: Ada, BASIC (Fluke, Microsoft, Quick, Tiny), dBase, FORTRAN (IV, 66, 77), graphviz, Lex, Pascal (Turbo, UCSD), Turbo Prolog, YACC
- Interpreted: AWK, BASIC (Level I, Extended BASIC), DOS Batch, csh, Perl, PHP, Postscript, SQL (MySQL, SQLite), XML
- Assembly: 1750A, 6502, 6809, 68000, 8051, 8080, 80x86 (MASM, TASM, Intel), ADSP-21xx, Z80
- Mathematical: MATLAB, Octave
- Hardware: ABEL, Lager, PLA, SPICE, Verilog, VHDL
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